In custom IC design, the schematic topology is composed of transistors, capacitors, resistors, inductors, macro blocks, wires, and etc. For the mask layout implementation, the layout designer creates these circuit components with mask layout devices in the layout design canvas. Generally, it is required to manipulate the placement of layout devices to optimize the mask layout design. Nonetheless, it may be difficult and time-consuming to manipulate the mask layout design when it is complicated and contains plenty of shapes with little on-canvas information to guide the placement and routing.
Some conventional approaches utilize a middleware or an intermediate module (e.g., a match device creator, a stick diagram compiler, etc.) that interposes between a schematic design and a layout of an electronic design. The middleware or intermediate module (collectively middleware hereinafter) presents a symbolic representation of an electronic design or a portion thereof that includes symbols of various electronic design elements for the ease of viewing, editing, debugging, etc. This symbolic representation, originally mapped from schematic, can be converted into mask layout, or translated from mask layout (collectively mapping hereinafter), to replace the need for directly editing complicated mask layout, however, in a lossy manner.
Such mappings are lossy in the sense that these mappings generalize and simplify the design elements (e.g., layout structures) by generating symbolic representations or symbols for electronic design elements and thus do not preserve all the design details of such electronic design elements. For example, the layout design elements in advanced process nodes have more shapes and complicated behaviors than those in mature process nodes, and these elements will vary foundry by foundry, which cannot possibly be fully captured by the same symbolic representation. That means certain types of editing are only allowed in the mask layout but not supported by the middleware, and these edits, if made, will be lost during mapping. When that happens, the middleware needs to be specially customized per process node in order to make it useful again, which incurs substantial support and maintenance efforts.
Therefore, there exists a need for a method, system, and computer program product for generating symbolic representation and information for a physical electronic design.